Proper Ground Plane Design For Mixed Signal Pcbs

Proper Grounding Mitigates Noise in Mixed Signal Designs

Establishing a low impedance return path for signals is critical in mixed signal printed circuit board (PCB) design. The ground plane provides this return path, allowing signal currents to complete their loop, which minimizes electromagnetic interference (EMI) emissions. Impedance discontinuities in the return path can enable noise coupling from digital switching into sensitive analog circuitry. A properly designed ground system routes return currents directly underneath their signal traces, using the ground plane as a shield to prevent crosstalk between circuits.

Understanding Return Current Paths for Signals

When current flows through a signal trace from a driver to a receiver, an equal return current flows back to the driver through the ground plane directly beneath the trace. This forms a loop with magnetic fields contained within the loop area. For optimal signal integrity and EMI control, the impedance of the return path must equal that of the signal trace. Discontinuities in the ground plane force return currents to detour around voids, increasing inductance and impedance. The lowest impedance path maintains a uniform ground plane width underneath the signal route. Careful PCB layout is required to ensure clean return current paths between integrated circuits.

Techniques for Achieving Low Impedance Reference Planes

A ground plane provides the zero volt reference needed for signals and analog front ends. Using a complete, unbroken ground plane layer minimizes impedance and inductance. Enlarging the width of the plane decreases impedance proportionally. For high frequency or fast switching digital circuits, thicker copper boards can better handle return currents without voltage drops across the plane. A 4 oz. copper plane demonstrates nearly half the impedance of a 1 oz. plane. Dedicated ground layers are preferred over using the board surface for optimal shielding and mechanical durability. Ground vias should be placed near integrated circuits and connectors while avoiding disrupting return current paths.

Example 4-Layer Stackup with Good Current Flows

Here is an example 4-layer PCB stackup designed for good ground plane current flows:

This stackup uses complete unbroken ground planes on Layers 2 and 3 to provide tightly coupled return current paths on both sides of each signal trace. Power is routed on Layer 1 and Layer 4 distributes signals. The power plane also shields sensitive analog signals from underlying digital noise sources. A large number of vias stitch together the ground planes, minimizing impedance for return currents. Each integrated circuit has local decoupling capacitors to further isolate high frequency noise from propagating across the planes. The 4 oz. copper and tightly coupled power/ground planes provide an excellent layout for mixed signal designs.

Separating Analog and Digital Grounds

In mixed signal designs, it is often necessary to separate sensitive analog circuitry from noisy digital switching electronics. While analog and digital circuits may share a common system ground point, partitioning the ground plane into analog and digital areas prevents coupled noise. High frequency current from fast digital logic can cause voltage spikes on the ground plane beneath ICs. A separate analog ground domain isolates ripple and fluctuations, keeping analog grounds solid and quiet.

Preventing Digital Switching Noise from Coupling into Analog Circuitry

Rapid switching of high speed digital logic can generate sharp current spikes as transistors toggle between high and low states. The changing currents produce transient noise on the ground plane which radiates directly into adjacent analog components. This can couple enough interference to disrupt the performance of amplifiers, ADCs, sensor front-ends and other precision analog circuitry. By dividing the PCB ground plane into separate analog and digital sections, with only a single common point, return current takes the path of least impedance within its own region without affecting the other domain. Any noise gets absorbed in the digital ground area.

Filtering Noise with Ferrite Beads and Capacitors

Further isolation between analog and digital domains can be achieved through the use of filters constructed from resistors, capacitors and ferrite beads. These form low pass filters to attenuation high frequency noise picked up on shared PCB traces and cables. Multiple filtering stages can provide greater then 80 dB of noise rejection over frequency ranges from 50 MHz to 2+ GHz. By installing filters on signals passing between analog and digital sections, EMI gets contained rather than coupled across the board. This improves SNR and effective resolution for precision measurements.

Example Schematic Using Split Analog/Digital Ground Plane

Here is a schematic example using distinct analog and digital ground planes:

The processor and related data bus circuitry refer to the digital ground plane at GND1 while the ADC, amplifier and sensors utilize the separate analog ground at GND2. Only at the power supply rail is there a common ground point between the domains. A low pass RC filter on the ADC data line prevents digital noise spikes from reaching the precision analog components. The separate ground planes prevent switching return currents from modulating the analog ground voltage.

Minimizing Ground Loops

Ground loops occur when two points in a system meant to share common ground have a slight voltage difference, causing current to flow between them through ground infrastructure. This acts as an antenna, emitting or receiving EMI. Multi-point grounding without care towards physical layout can enable such ground loops. Systematic PCB layout with strategic isolation between ground domains prevents parasitic currents.

Defining Ground Loops and How They Cause Problems

A ground loop forms when two distant ground points are at slightly different voltages, causing current to flow as the path of least resistance. The area enclosed by the loop creates an inductive antenna, emitting or receiving electromagnetic interference. On mixed signal boards with both analog and digital grounds, noise inadvertently coupled from output to input circuitry can induce ground potential differences. The resulting current then circulates as a ground loop, aggregating noise injection across multiple points. This leads to decreased signal integrity, introduction of non-deterministic artifacts and lower SNR ratios. Ground loops demonstrate the importance of deliberate, noise-aware grounding design.

Location of Ground Point Connections

Careful attention must be paid to the location of ground point connections when designing complex mixed signal systems spanning multiple PCBs and integrated circuits with internal ground planes. All devices should tie into a common system ground point located at the power supply. Intermediate PCBs can reference local ground planes to this through their connectors. On board, devices should have short direct connections to the ground plane layer, with a unified ground serving analog and digital sections. Separate domains only split at high noise components. This prevents area loop antennas while facilitating return currents across circuits.

Diagram Showing Ground Loop Area as an Antenna

This diagram depicts a ground loop formed within a mixed signal system:

Here, two integrated circuits tie into both the digital and analog ground planes at different locations, forming a loop. Noise current from IC1 switching flows through AGND to AGND2 and back to IC1 through DGND and DGND2. The area inside the loop acts as an antenna, emitting EMI which can couple into other circuitry. A shared unified ground plane would prevent this loop.

Sufficient Decoupling for Each Integrated Circuit

Decoupling capacitors provide localized charge reservoirs for integrated circuits as power draw changes during operation. These bypass capacitors filter high frequency noise on supply rails before it can propagate across the PCB. Proper selection and placement of decoupling caps is essential for stabilizing voltage to sensitive mixed signal components while containing switching noise.

Purpose of Decoupling Capacitors

As ICs switch states rapidly during computation and logic operation, transient currents causes voltage ripple on supply rails. Localized decoupling capacitors counteract this by sourcing current when demands rapidly increase. The capacitors then recharge smoothly from the main power distribution, isolating the IC from supply noise. For mixed signal systems, decoupling caps prevent digital logic noise from reaching vulnerable analog components through the shared power distribution network. Appropriate values filter high frequency noise.

Values and Types of Decoupling Caps to Use

A parallel network of decoupling capacitors of varying values provides attenuation across a wide band of frequencies. Low value ceramic capacitors directly adjacent to each IC deliver charge necessary for rapid transient spikes, while progressively higher value electrolytics stabilize lower frequency fluctuations. Typical groupings would be a 10 nF ceramic, a 0.1 uF ceramic and 10 – 100 uF tantalum electrolytic cap. These work together to isolate ICs locally and contain noise.

Code Snippet Showing Decoupling Cap Placement for Sample IC

Here is a hardware description code snippet instantiating the recommended decoupling capacitors network along with an integrated ADC component:

ADC_16BIT ADC1 (
  .VCC(VCC),
  .GND(GND),
  .VIN(SensorInput) 
  )

Capacitor C1 (
  .Node1(VCC),
  .Node2(GND), 
  .C(10nF)
)

Capacitor C2 (
  .Node1(VCC),
  .Node2(GND),
  .C(0.1uF)  
) 

Capacitor C3 (
  .Node1(VCC),
  .Node2(GND),
  .C(100uF)
)

This groups the 10 nF, 0.1 uF decoupling caps directly alongside the analog ADC component, with the larger bulk 100 uF tantalum on the same rail helping stabilize voltage across the entire substrate layer. This pattern would be replicated for each IC peripheral to isolate noise.

Proper Use of Ground Planes

Strategic design of ground planes can contain noise through directed isolation and impedance control. Best practices utilize a solid continuous backplane for low inductance and excellent shielding, except in special cases where partitions and voids purposefully direct return currents and cross talk.

Benefits of Continuous vs. Partitioned Ground Planes

A single, unbroken ground plane offers the best noise immunity and emissions control via low impedance signal returns paths and high rates of magnetic flux cancellation. Currents evenly spread across the layer, preventing hot spots from clustered flow. This protects signal integrity from noise injection and avoids radiated interference to adjacent boards. However, some high frequency or widely separated mixed signal components perform better with intentional partitions to steer return current under matching traces.

Reducing Noise Through Strategic Cuts in Ground Planes

While generally keeping the ground plane solid without openings or breaks, strategic cuts help isolate noise sensitive circuits. For example, a gap in the ground plane can block electromagnetic interference produced by a microcontroller from coupling into an analog sensor front end. Return currents detour around the void, keeping radiated cross talk very low. Cuts should alignment such that FLux lines cancel and do not leave the board. Careful modeling determines optimal partition placements specific to a layout.

Image Showing Example Ground Plane Partition Layout

Here is an example ground plane with an isolation gap to protect sensitive analog components:

The digital microntroller is separated from the analog amplifier and ADC by a thin split in both the ground an power plane distribution layers. Return currents are thereby kept local, preventing the magnetically radiated spikes from the high speed digital switching noise from coupling into the precision analog section. The amplifier and ADC have their own local decoupling capacitors to furth isolate from any residual noise on the backplane rails.

Verifying Ground Integrity

Robust ground connections through the layout must be verified before full manufacture to ensure unblemished performance. Checking for inductance, resistance and impedance discontinuities isolates any vulnerabilities to ground bounce or digital coupling into analog domains. Smooth unbroken ground pours establishes dependable return current paths.

Role of Vias in Ground Connections

Vias stitch together the ground planes, tying both layers to shared reference points that route back to the ground origin. An absence of via connections allows a break in the return current, increasing impedance, noise pickup and emissions. Each component that interfaces with the ground layer should connect through two vias, ensuring redundant connections even if one fails. Ground vias should intersperse across the plane for robustness.

Testing Ground Paths for Inductance and Resistance

Prior to full PCB fabrication, the layout software ground pour can simulate resistance and detailed impedance analysis. Any detected voids or thin traces should be reworked to fulfill ground design criteria. Design validation applies test probes across suspicious traces to measure voltage variance and deploy ring down measurements for inductance quality. Further confirmation comes from prototype boards using an impedance analyzer.

Code for Sample Ground Checker Circuit

Here is code for a simple ground path integrity checker that uses an oscilloscope to probe for noise:

function VerifyGround(probeLocation) {

  // Switch test load on/off
  testLoad.toggle(); 

  // Measure resulting ground noise 
  let noiseVoltage = probeAt(probeLocation).ScopeRead()

  if (noiseVoltage > MAX_NOISE_VOLTAGE) {
    FlagError(probeLocation) 
  }

}

// Scan entire ground plane
for location in GROUND_PLANE {

   VerifyGround(location)

}

This drives a toggling load across the various ground plane split areas, measuring resulting voltage spikes on nearby probe points. Noise beyond acceptable thresholds raises alert flags to prompt PCB layout adjustment before fabrication. Running verification over the entire layout ensures robust return current paths.